CS 35101 Computer Architecture

Section

Tue and Thu, 11 - 12:15, 120 MSB

Learning Objectives

Understand computer hardware, software, and hardware/software interface. Write simple Assembly programs based on RISC architectures. Demonstrate design principles that are basis for uni-processor and multicore processors.

Text

Patterson and Hennessy, Computer organization and design, the hardware/software interface, 4th edition, Morgan Kaufmann Publishers.

Course Contents

This course is intended primarily as a computer science course in computer architecture at the advanced undergraduate level. It focuses on performance and cost analysis, computer architecture, memory systems, input/output systems, functional units, CPU, pipelining, memory hierarchy, and parallel processing. This course helps students to learn:

• The role of performance measurement and evaluation.
• The basics of an instruction set and assembly language programming using RISC architecture.
• The important principles of computer organization and key ideas such as representation of integers and floating-points numbers, and arithmetic algorithms,
• The key ideas in control mechanisms including pipelining.
• The organization and control.
• Principles of memory hierarchies and unifying the ideas of caching and virtual memory.
• The key principles of multiprocessors and multicomputer systems.

Credits

3

Course Information

• Grade
• General Policies
• Students with Disabilities

In accordance with University policy, if you have a documented disability and require accommodations, please contact the instructor at the beginning of the semester. Students with disabilities must verify their eligibility through Accessibility Services (contact 330-672-3391 or visit www.kent.edu/sas for more information on registration procedure).