Robert A. Walker
- - Publications - -
Computer Science Department
Kent State University
Kent, OH 44242
Department Chair's Office: 233a Math & CS Building, (330) 672-9055
Research Office: 351 Math & CS Building, (330) 672-9105
http://www.cs.kent.edu/~walker
walker@cs.kent.edu
2. A
Survey of High-Level Synthesis Systems,
Robert A. Walker and Raul Camposano, Kluwer Academic Publishers, Boston, 1991.
88 citations on Google Scholar on 18 July 2007
1. Algorithmic
and Register-Transfer Level Synthesis: The System Architect's Workbench, D.E. Thomas, E.D. Lagnese, R.A. Walker, J.A.
Nestor, J.V. Rajan, and R.L. Blackburn, Kluwer Academic Publishers, Boston,
1990.
108
citations on Google Scholar on 18 July 2007
9. "Kluwer Academic Publisher Editorial: SIMDs — Back in Style!", Robert A. Walker, System Design Frontier, 3(8):3-6, August 2006.
8. "Efficient
Optimal Design Space Characterization Methodologies", Stephen A. Blythe
and Robert A. Walker, ACM Transactions on Design Automation of Electronic
Systems, 5(3):322-336, July 2000.
http://doi.acm.org/10.1145/348019.348058
7 citations on Google Scholar on 18 July 2007
7. "A
Solution Methodology for Exact Design Space Exploration in a Three-Dimensional
Design Space", Samit Chaudhuri, Stephen A. Blythe, and Robert A. Walker, IEEE
Transactions on VLSI Systems 5(1):69-81,
March 1997.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=555988
13 citations on Google Scholar on 18 July 2007
6. "Computing
Lower Bounds on Functional Units Before Scheduling", Samit Chaudhuri and
Robert A. Walker, IEEE Transactions on VLSI Systems 4(2):273-279, June 1996.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=502199&isnumber=10826
36 citations on Google Scholar on 18 July 2007
5. "High-Level
Synthesis: Introduction to the Scheduling Problem", Robert A. Walker and
Samit Chaudhuri, IEEE Design and Test
12(2):60-69, Summer 1995.
http://doi.ieeecomputersociety.org/10.1109/54.386007
40 citations on Google Scholar on 18 July 2007
4. "The
Status of High-Level Synthesis: Guest Editor's Introduction", Robert A.
Walker, IEEE Design and Test
11(4):42-43, Winter 1994.
http://doi.ieeecomputersociety.org/10.1109/MDT.1994.10024
3. "Analyzing
and Exploiting the Structure of the Constraints in the ILP Approach to the
Scheduling Problem", Samit Chaudhuri, Robert A. Walker, and John E. Mitchell,
IEEE Transactions on VLSI Systems 2(4):456-471,
December 1994.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=335014
56 citations on Google Scholar on 18 July 2007
2. "Behavioral
Transformation for Algorithmic Level IC Design", Robert A. Walker and
Donald E. Thomas, IEEE Transactions on Computer-Aided Design 8(10):1115-1128, October 1989.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=39073
60 citations on Google Scholar on 18 July 2007
1. "Automatic
Data Path Synthesis", D.E. Thomas, C.Y. Hitchcock, III, T.J. Kowalski,
J.V. Rajan, and R.A. Walker, IEEE Computer 16(12):59-70,
December 1983.
42 citations on Google Scholar on 18 July 2007
29. "A
Prototype Multithreaded Associative SIMD Processor", Kevin Schaffer and
Robert A. Walker, in Proc. of the 21st International Parallel and
Distributed Processing Symposium (Workshop on Advances in Parallel and
Distributed Computing Models, abstract on
page 228, full text on CDROM. Long
Beach, California, March 2007.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4228199
28. "Implementing
a Multiple-Instruction Stream Associative MASC Processor", Hong Wang and
Robert A. Walker, in Proc. of the 18th International Conference on Parallel
and Distributed Computing and Systems,
pages 460-465. Dallas, Texas,
November 2006.
http://www.actapress.com/PaperInfo.aspx?PaperID=28832
46% acceptance rate (106 out of 228)
27. "Solving
the Longest Common Subsequence (LCS) Problem using the Associative ASC
Processor with Reconfigurable 2D Mesh", Sabegh Singh Virdi, Hong Wang, and
Robert A. Walker, in Proc. of the 18th International Conference on Parallel
and Distributed Computing and Systems,
pages 454-459. Dallas, Texas,
November 2006.
http://www.actapress.com/PaperInfo.aspx?PaperID=28831
46% acceptance rate (106 out of 228)
26. "Interrupt
Triggered Software Prefetching for Embedded CPU Instruction Caches", Ken
W. Batcher and Robert A. Walker, in 12th Real-Time and Embedded Technology
and Applications Symposium, pp. 91-100. San
Jose, California, April 2006.
http://doi.ieeecomputersociety.org/10.1109/RTAS.2006.24
30% acceptance rate (38 out of 128)
25. "A
Scalable Pipelined Associative SIMD Array with Reconfigurable PE
Interconnection Network for Embedded Applications", Hong Wang and Robert
A. Walker, in Proc. of the 17th International Conference on Parallel and
Distributed Computing and Systems, pp.
667-673. Phoenix, Arizona,
November 2005.
http://www.actapress.com/PaperInfo.aspx?PaperID=22375
24. "Cluster
Miss Prediction with Prefetch on Miss for Embedded CPU Instruction
Caches", Ken Batcher and Robert A. Walker, in Proc. of the 7th
International Conference on Compilers, Architecture, and Synthesis for Embedded
Systems, pp. 24-34. Washington DC, September 2004.
http://doi.acm.org/10.1145/1023833.1023839
30% acceptance rate (31 out of 102)
23. "Efficient
Associative SIMD Processing for Non-Tabular Structured Data", Jalpesh K.
Chitalia and Robert A. Walker, in Proc. of the 2nd Northeast Workshop on
Circuits and Systems (NEWCAS), pp.
265-268. Montreal, Canada, June
2004.
http://ieeexplore.ieee.org/search/freesrchabstract.jsp?arnumber=1359082&isnumber=29808&punumber=9395&k2dockey=1359082@ieeecnfs&query=1359082%3Cin%3Earnumber&pos=0
71% acceptance rate (104 out of 147)
22. "A
Scalable Associative Processor with Applications in Database and Image
Processing", Hong Wang, Lei Xie, Meiduo Wu, and Robert A. Walker, in Proc.
of the 18th International Parallel and Distributed Processing Symposium
(Workshop in Massively Parallel Processing),
abstract on page 259, full text on CDROM.
Santa Fe, New Mexico, April 2004.
http://ieeexplore.ieee.org/search/freesrchabstract.jsp?arnumber=1303327&isnumber=28950&punumber=9132&k2dockey=1303327@ieeecnfs&query=1303327%3Cin%3Earnumber&pos=0
21. "Cluster
Miss Prediction for Instruction Caches in Embedded Networking Applications",
Ken Batcher and Robert A. Walker, in Proc. of the 14th Great
Lakes Symposium on VLSI, pp. 358-363. Boston, Massachusetts, April 2004.
http://doi.acm.org/10.1145/988952.989039
41% acceptance rate (96 out of 237)
20. "Implementing
A Scalable ASC Processor", Hong Wang and Robert A. Walker, in Proc. of
the 17th International Parallel and Distributed Processing Symposium (Workshop
in Massively Parallel Processing), abstract
on page 267, full text on CDROM.
Nice, France, April 2003.
http://ieeexplore.ieee.org/search/freesrchabstract.jsp?arnumber=1213482&isnumber=27277&punumber=8608&k2dockey=1213482@ieeecnfs&query=1213482%3Cin%3Earnumber&pos=0
19. "Implementing
Associative Search and Responder Resolution", Meiduo Wu, Robert A. Walker,
and Jerry Potter, in Proc. of the 16th International Parallel and
Distributed Processing Symposium (Workshop in Massively Parallel Processing), abstract on page 246, full text on CDROM. Ft. Lauderdale, Florida, April 2002.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=1016666
18. "Implementing
Associative Processing: Rethinking
Earlier Architectural Decisions", Robert Walker, Jerry Potter, Yanping
Wang, and Meiduo Wu, in Proc. of the 15th International Parallel and
Distributed Computing Symposium (Workshop on Massively Parallel Processing), abstract on p. 195, full text on accompanying
CDROM. San Francisco, California,
April 2001.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=925207
17. "A
Practical One-Semester 'VLSI Design' Course for Computer Science (and Other)
Majors", Robert A. Walker, in Proc. of the ACM Special Interest Group
on Computer Science Education Technical Symposium, pp. 237-241. New
Orleans, Louisiana, March 1999.
http://doi.acm.org/10.1145/384266.299769
16. "Efficiently
Searching the Optimal Design Space", Stephen A. Blythe and Robert A.
Walker, in Proc. of the Ninth Great Lakes Symposium on VLSI, pp. 192-195. Ypsilanti, Michigan, March 1999.
http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757408
15. "Bounding
Algorithms for Design Space Exploration", Samit Chaudhuri and Robert A.
Walker, in Proc. of the Ninth Great Lakes Symposium on VLSI, pp. 234-235. Ypsilanti, Michigan, March 1999.
http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757420
14. "Flexible
Parallel Processing in Memory:
Architecture + Programming Model", Nael B. Abu-Ghazaleh, Philip A.
Wilsey, Jerry Potter, Robert Walker, and Johnnie Baker, in Proc. of the Third
Petaflop Workshop. Annapolis, Maryland, February 1999.
http://citeseer.ist.psu.edu/675433.html
13. "Toward
a Practical Methodology for Completely Characterizing the Optimal Design
Space", Stephen A. Blythe and Robert A. Walker, in Proc. of the 9th
International Symposium on System Synthesis, pages
8-13. La Jolla, California, November 1996.
http://doi.ieeecomputersociety.org/10.1109/ISSS.1996.565870
29% acceptance rate (23 out of 80)
14 citations on Google Scholar on 18
July 2007
12. "An
Exact Methodology for Scheduling in a 3D Design Space", Samit Chaudhuri,
Stephen A. Blythe, and Robert A. Walker, in Proc. of the 8th International
Symposium on System Synthesis, pages
78-83. Cannes, France, September 1995.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=520616
32% acceptance rate (25 out of 79)
27 citations on Google Scholar on 18
July 2007
11. "Computing
Lower Bounds on Functional Units Before Scheduling", Samit Chaudhuri and
Robert A. Walker, in Proc. of the 7th International Symposium on High-Level
Synthesis, pages 36-41. Niagara-on-the-Lake, Ontario, May 1994.
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=302344
39% acceptance rate (26 out of 67)
10. "ILP-Based
Scheduling with Time and Resource Constraints in High-Level Synthesis",
Samit Chaudhuri and Robert A. Walker, in Proc. of the Seventh International
Conference on VLSI Design, pages
17-25. Calcutta,
India, January 1994.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=282637
54% acceptance rate (90 out of 167)
9. "The
Structure of Assignment, Precedence, and Resource Constraints in the ILP
Approach to the Scheduling Problem", Samit Chaudhuri, Robert A. Walker,
and John Mitchell, in Proc. of the 1993 International Conference on Computer
Design, pages 25-29. Cambridge, Massachusetts, October
1993.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=393410
8. "Cluster-Oriented
Scheduling in Pipelined Data Path Synthesis", Ching-Tang Chang, Kenneth
Rose, and Robert A. Walker, in Proc. of the 1993 International Conference on
Computer Design, pages 374-378. Cambridge, Massachusetts, October
1993.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=393349
7. "High-Level
DSP Synthesis Using the COMET Design System", Ching-Tang Chang, Kenneth
Rose, and Robert A. Walker, in Proc. of the 1993 ASIC Conference, pages 408-411. Rochester, New York, September 1993.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=410748
62% acceptance rate
6. "COMET:
A Set of Global Transformation Algorithms for High-Level Pipeline
Synthesis", Ching-Tang Chang, Kenneth Rose, and Robert A. Walker, in Proc.
of the Int. Symp. on VLSI Tech. Systems and Applications, pages 49-53. Taipei, Taiwan, May 1993.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=263625
5. "Increasing
User Interaction During High-Level Synthesis", Robert A. Walker, Shivkumar
Ramabadran, Rajive Joshi and Steinar Flatland, in Proc. of the 24th Annual International Symposium on
Microarchitecture, pages 133-142. Albuquerque, New Mexico, November 1991.
http://doi.acm.org/10.1145/123465.123493
43% acceptance rate (26 out of 61)
4 citations on Google Scholar on 18 July
2007
4. "The
System Architect's Workbench", D.E. Thomas, E.M. Dirkes, R.A. Walker, J.V.
Rajan, J.A. Nestor, and R.L. Blackburn, in Proc. of the 25th Design
Automation Conference, pages
337-343. Anaheim, California, June
1988.
http://portal.acm.org/citation.cfm?id=285785&dl=ACM&coll=portal
31% acceptance rate (125 out of 400)
75 citations on Google Scholar on 18
July 2007
3. "Design
Representation and Transformation in The System Architect's Workbench",
Robert A. Walker and Donald E. Thomas, in Proc. of the International Conference on CAD-87, pages 166-169. Santa Clara, California, November 1987.
39% acceptance rate (171 out of 440)
2. "A
Model of Design Representation and Synthesis", Robert A. Walker and Donald
E. Thomas, in Proc. of the 22nd Design Automation Conference, pages 453-459. Las Vegas, Nevada, June 1985.
Nominated for the Best Paper Award in the Systems, Languages, and Software
Category.
http://doi.acm.org/10.1145/317825.317928
27 citations on Google Scholar on 18 July 2007
1. "Behavioral
Level Transformation in the CMU-DA System", Robert A. Walker and Donald E.
Thomas, in Proc. of the 20th Design Automation Conference, pages 788-789. Miami, Florida, June 1983.
http://portal.acm.org/citation.cfm?id=800761&dl=ACM&coll=portal
7 citations on Google Scholar on 18 July 2007