Papers delivered at conferences authored or co-authored by Kenneth E. Batcher.

  1. Sorting Networks and their Applications, 1968 Spring Joint Computer Conference, AFIPS Proc. vol. 32, pp 307-314.
  2. Flexible Parallel Processing and STARAN, 1972 WESCON Technical Papers, Session 1.
  3. STARAN/RADCAP Hardware Architecture, 1973 Sagamore Computer Conf. on Parallel Processing, pp 147-152.
  4. STARAN Parallel Processor System Hardware, 1974 National Computer Conf., AFIPS Proc. vol. 43, pp 405-410.
  5. The Multi-Dimensional Access Memory in STARAN, 1975 Sagamore Computer Conf. on Parallel Processing, p 167.
  6. The Flip Network in STARAN, 1976 Int'l. Conf. on Parallel Processing, pp 65-71.
  7. STARAN Series E, 1977 Int'l. Conf. on Parallel Processing, pp 140-143.
  8. MPP - A Massively Parallel Processor, 1979 Int'l. Conf. on Parallel Processing, p 249.
  9. The Massively Parallel Processor (MPP) System, AIAA Second Computers in Aerospace Conf., pp 93-97, Oct. 1979.
  10. Architecture of a Massively Parallel Processor, Seventh Int'l. Symposium on Computer Architecture, pp 168-173, May 1980. Reprinted in `Selected Papers of 25 Years of the Int'l. Symposia on Computer Architecture`, ed. Gurindar Sohi, ACM Press, 1998, pp 174-179.
  11. MPP: A Supersystem for Satellite Image Processing, 1982 National Computer Conf., AFIPS Proc. vol. 51, pp 185-191.
  12. Architecture of the MPP, 1983 IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Data Base Management (CAPAIDM), pp 170-174.
  13. The MPP Staging Memory, 1984 Int'l. Conf. on Parallel Processing, pp 496-498.
  14. The Massively Parallel Processor (MPP), IEEE Spring Compcon 1985, pp 21-24.
  15. VLSI in the Massively Parallel Processor, Advanced Research in VLSI: Proceedings of the Fourth MIT Conference, edited by C. E. Leiserson, MIT Press, April 1986, p 235.
  16. The Architecture of Tomorrow's Massively Parallel Computer, Invited Keynote Address at the Frontiers of Massively Parallel Scientific Computation Conference, NASA Conference Publication 2478, Sept. 1986, pp 151-157.
  17. The MPP in the Future, Sixth Annual Int'l. Phoenix Conf. on Computers and Communications, Feb. 1987, pp 60-62.
  18. On Bitonic Sorting Networks, 1990 Int'l. Conf. on Parallel Processing, vol. I, pp 376-379.
  19. Decomposition of Perfect Shuffle Networks, 1991 Int'l. Conf. on Parallel Processing, vol. I, pp 255-262.
  20. Multiple Fault Tolerant Cube-Connected Cycles Networks, 1991 Int'l. Conf. on Parallel Processing, vol. I, pp 327-330, (co-authored with C. Jimmy Shih).
  21. A Modulo Merge Sorting Network, Fourth Symposium on the Frontiers of Massively Parallel Computation (Frontiers 92), pp 164-169, IEEE Computer Society Press, Oct. 1992 (co-authored with Kathy J. Liszka).
  22. Low-cost Flexible Simulation with the Static Perfect Shuffle Network, Fourth Symposium on the Frontiers of Massively Parallel Computation (Frontiers 92), pp 434-441, IEEE Computer Society Press, Oct. 1992.
  23. A Generalized Bitonic Sorting Network, 1993 Int'l. Conf. on Parallel Processing, vol. I, pp 105-108, Aug. 1993 (co-authored with Kathy J. Liszka).
  24. On the Bit-Level Complexity of Bitonic Sorting Networks, 1993 Int'l. Conf. on Parallel Processing, vol. III, pp 209-213, Aug. 1993 (co-authored with Majed Al-Hajery).
  25. Multicast Bitonic Network, Fifth IEEE Symp. on Parallel and Distributed Processing, pp 320-326, Sep. 1993 (co-authored with Majed Al-Hajery).
  26. Low Cost Complexity of k-bits Bitonic Sorting Network, Sixth Int'l. Conf. on Parallel and Distributed Computing Systems, pp 443-447, Oct. 1993 (co-authored with Majed Al-Hajery).
  27. Low Cost Complexity of a General Multicast Network, Eighth Annual Int'l. Parallel Processing Symposium, pp 23-29, Apr. 1994 (co-authored with Majed Al-Hajery).
  28. On Sorting Multiple Bitonic Sequences, 1994 Int'l. Conf. on Parallel Processing, vol. I, pp 121-125, Aug. 1994 (co-authored with De-Lei Lee).
  29. SIMD or MIMD?, Invited Plenary Address at the Seventh Int'l. Conf. on Parallel and Distributed Computing Systems, Oct. 1994.
  30. Partitioning the Recirculating Shuffle-Exchange Network, Seventh Int'l. Conf. on Parallel and Distributed Computing Systems, pp 22-27, Oct. 1994 (co-authored with Jae-dong Lee).
  31. On the Multicast Routing in Bit-Serial Sorting Networks, Seventh Int'l. Conf. on Parallel and Distributed Computing Systems, pp 446-453, Oct. 1994 (co-authored with Majed Al-Hajery).
  32. Simplifying Multistage Hardware Interconnections in the Bitonic Sorting Network, Seventh IASTED/ISMM Int'l. Conf. on Parallel and Distributed Computing and Systems, pp 138-142, Oct. 1995 (co-authored with Jae-Dong Lee).
  33. Fault Detection in Bitonic Sorting Networks, Seventh IEEE Symposium on Parallel and Distributed Processing, pp 266-270, Oct. 1995 (co-auhored with Hongin Choi).
  34. Bitonic Sorting on Benes Networks, Tenth Int'l. Parallel Processing Symposium (IPPS '96), pp 749-753, Apr. 1996 (co-authored with Beverly M. Gocal).
  35. A Bitonic Sorting Network with Simpler Flip-Interconnections, Second Int'l. Symp. on Parallel Architectures, Algorithms, and Networks (I-SPAN '96), pp 104-109, June 1996 (co-authored with Jae-Dong Lee).
  36. Minimizing Communication of a Recirculating Bitonic Sorting Network, 1996 Int'l. Conf. on Parallel Processing, vol. I, pp 251-254, Aug. 1996 (co-authored with Jae-Dong Lee).
  37. Using the Quartet property to design recursively expandable optical switches, Proceedings of the International Society for Optical Engineering - (SPIE 2001), (co-authored with M. Rahmani).
  38. Fallacies and Pitfalls in Building Supercomputers, Invited Plenary Address at the International Conference for High Performance Computing, Networking, Storage and Analysis (SC07), 2007.
Kenneth E. Batcher - 11/29/2008