Research Statement of Jalpesh Chitalia:

With inevitable parallel processing, it will be only wise to make available, efficient techniques for the future!

He has bachelors degree in computer engineering from University of Pune and an associates degree in computer technology from Bombay Institute of Technology.  He got a research exposure while working at Hughes Software Systems before he got back to school at Kent State University (KSU) for a masters program in Fall 2002.  Department of Computer Science at KSU is famous for its research in parallel processing.  His interests in computer architecture and parallel processing, in general, led him to join the Parallel Processing Group.

The Parallel Processing Group is building a whole new parallel computer with an unconventional associative (ASC) paradigm based on a Single Instruction Multiple Data (SIMD) like architecture, and eventually a Multiple-SIMD (MSIMD) architecture exploiting multiple instruction streams in the same program.  This paradigm is defined by Prof. Jerry Potter at KSU in his book on Associative Computing.  The group consists of three main areas of research: processor design, algorithm design, and run-time environment.  Various people are working to improve and enhance the existing developments, and producing a better parallel computer.  Basic concepts of ASC paradigm can be best understood from their select publications.

His research advisor, Prof. Robert A. Walker, is leading the processor design efforts.  The current version of ASC processor, built on a million gate Altera's Apex20K FPGA, has one controller and 36 simple processing elements; these processing elements can be arranged either linearly or in a 2D mesh.  With such a support, and a scalable chip design, the ASC processor also supports novel features like constant time searching of a value (or a key), and searching of minimum (and maximum) from a field.  These features and the given algorithms for ASC computing, make things simpler and efficient for relational database processing, in particular.

In general, any tabular data that could be divided amongst the processing elements equally can be processed efficiently on any SIMD (or like) architecture.  With special constant time features, ASC offers a better bargain for such structures or algorithms.  His research, in particular, focuses on development of a novel concept called "Structure Codes", thus allowing parallel processing of non-tabular data structures.  He published (.pdf file, requires Acrobat Reader) his experiments and results at the IEEE sponsored NEWCAS 2004 in Montreal.  He completed his thesis on 2nd September 2004 (for a short presentation click here), and was awarded Masters in Computer Science in 2004.

He worked as a software consultant at a research company, Ecrio, developing new generation, standard-compliant wireless applications for various operating systems.  He joined the graduate school again, to pursue his doctoral degree.   His current research interests include parallel processing, networks on chip, and parallel applications for embedded applications.